Some More Assembly Language Instructions

Some more Assembly language instructions

1.)LOGICAL OR REGISTER OR MEMORY WITH ACCUMULATOR:
ORA (R):

The contents of the accumulator are logically ORed with M the contents of operand(register or memory), and theb result is placed in the accumulator.
If the operand is the memory location, its address is specified by the contents of HL registers. S, Z, P are modified to reflect the result of the operation, CY ands AC are reset.
Example:
ORA B or ORA M

2)LOGICAL OR IMMEDIATE WITH ACCUMULATOR: ORI 8- bit data:

The contents of the accumulator are logically ORed with the 8-bit data(operand) and the result is placed in the accumulator. S, Z, P are modified to reflect the result of operation. CY and AC are reset.
Example:
ORI 86H
3)ROTATE ACCUMULATOR LEFT : RLC (no operand)

Each binary bit of the accumulator is rotated left by one position. Bit D7 is placed in the position of D0 as well as in carry flag. CY is modifiedaccording to the bit D7. S, Z, P, AC are not affected.
Example:
RLC
4)ROTATE ACCUMULATOR RIGHT: RRC (no operand):

Each binary bit of the accumulator is rotated by ont position. Bit D0 is placed in position of D7 as well as in the carry flag. CY is modified according to bit D0. S, Z, P, AC are not affected.
Example:
RRC
5)ROTATE ACUMULATOR LEFT THROUGH CARRY: RAL (no operand):

Each binary bit of the accumulator is rotated left by one position through carry flag. Bit D7 is placed in the carry flag, and the carry flag is placed in the least significance position D0. CY is modified according to bit D7. S, Z, P, AC are not affected.
Example:
RAL
6)ROTATE ACCUMULATOR RIGHT WITH CARRY: RAR (no operand):

Each binary bit of the accumulator is rotated right by one position through carry flag. Bit D0 is placed in the carry flag, and the carry flag is placed in the least significance position D7. CY is modified according to bit D7. S, Z, P, AC are not affected.
Example:
RAR

7)CONTROL INSTRUCTIONS:

1. NO OPERATION : NOP( no operand):

No operation is performed. The ionstruction is fetched and decoded. However no oparetion is executed.
Example:
NOP
2. HALT AND ENTER WAIT STATE: HLT( no operand):

The CPU finishesexecuting the current instruction and halts any further execution. An interrupt or reset is necessaryto exit from te halt state.
Example:
HLT
3. DISABLE INTERRUPTS: DI (no operand):

The interrupt enable flip flop is reset and all the interrupts except the TRAP are disable. No flags are affected.
Example:
DI
4. ENABLE INTERRUPTS: EI (no operands):

The interrupt enable flip flop is set and all the interrupts are enabled. No flags are affected. After a system reset or acknowledgement of an interrupt, the interrupt enable flip flop is reset, thus disabling the interrupts. This instruction is necessary to reenable the interrupts ( except TRAP).
Example:
EI
5. READ INTERRUPT MASK: RIM (no operand)

This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit. The instruction loads 8-bits in the accumulator.
Example:
RIM
6. SET INTERRUPR MASK: SIM (no operands):

This is a multipurpose instruction and used to implement the 8085 interrupts 7.5, 6.5, 5.5 and serial data output.
Example:
SIM.