Microprocessors & Assembly Language Programming
1 mark Questions
State true or false:
Q1.The order of instructions used to initialize 8279 is important.Q2. RST 7.5 IS LATCHED IN 8085.Q3. After HOLD is activated, the bus control is relinquished by 8085 after the instruction is executed.Q4. INTA pulses are required because INTR is having the lowest priority.Q5. With encoded scan keyboard mode, the total number of keys are connected to 8279 is 128.Q6. Asynchronous mode of 8251 is used for very high rate of data transfer.
Q7. POP D is data transfer of instruction.Q8. ALE signal is required because higher order bus is multiplexed with data in 8085.
Q9. 'Opcode Fetch ’machine cycle is of 4t states for all instructions.Q10. RST 4.5 pin causes microprocessor 8085 to go in to ‘WAIT’ state.Q11. If register H=OOH, L=OIH, then by using DCX h instruction will set zero flag.Q12. RST5 is a direct addressing mode type instruction.
Fill in the blanks:
Q13. Microprocessor 8085 is a ------------------ bit processor.
Q14. Microprocessor 8086 is a ------------------ bit processor.
Q15. Microprocessor has ------------ number of pins.
Q16. Address bus of 8085 microprocessor is of -------- bits.
Q17. Data bus of 8085 microprocessor is of -------- bits.
Q18. Address bus of 8086 microprocessor is of -------- bits.
Q19. Data bus of 8086 microprocessor is of -------- bits.
Q20. Examples of 1-byte instruction -------------------------.
Q21. Examples of 2-byte instruction -------------------------.
Q22. Examples of 3-byte instruction -------------------------.
Q23. STA 2500 H takes ------------------ machine cycles.
Q24. LDA 2500 H takes ------------------ machine cycles.
Q25. MOV A,B takes ------------------ machine cycles.
Q26. LXI H 2600 H takes ------------------ machine cycles.
Q27. ADI ,09 takes ------------------ machine cycles.
Q28. IN ,02 takes ------------------ machine cycles.
Q29. Opcode fetch cycle takes ------------ T- states.
Q30. Memory read cycle takes ------------ T- states.
Q31. Memory write cycle takes ------------ T- states.
Q32. There are ------------- addressing modes.
