Some More Assembly Language Instructions

Some more Assembly language instructions

1.)LOGICAL OR REGISTER OR MEMORY WITH ACCUMULATOR:
ORA (R):

The contents of the accumulator are logically ORed with M the contents of operand(register or memory), and theb result is placed in the accumulator.
If the operand is the memory location, its address is specified by the contents of HL registers. S, Z, P are modified to reflect the result of the operation, CY ands AC are reset.
Example:
ORA B or ORA M

2)LOGICAL OR IMMEDIATE WITH ACCUMULATOR: ORI 8- bit data:

The contents of the accumulator are logically ORed with the 8-bit data(operand) and the result is placed in the accumulator. S, Z, P are modified to reflect the result of operation. CY and AC are reset.
Example:
ORI 86H
3)ROTATE ACCUMULATOR LEFT : RLC (no operand)

Each binary bit of the accumulator is rotated left by one position. Bit D7 is placed in the position of D0 as well as in carry flag. CY is modifiedaccording to the bit D7. S, Z, P, AC are not affected.
Example:
RLC
4)ROTATE ACCUMULATOR RIGHT: RRC (no operand):

Each binary bit of the accumulator is rotated by ont position. Bit D0 is placed in position of D7 as well as in the carry flag. CY is modified according to bit D0. S, Z, P, AC are not affected.
Example:
RRC
5)ROTATE ACUMULATOR LEFT THROUGH CARRY: RAL (no operand):

Each binary bit of the accumulator is rotated left by one position through carry flag. Bit D7 is placed in the carry flag, and the carry flag is placed in the least significance position D0. CY is modified according to bit D7. S, Z, P, AC are not affected.
Example:
RAL
6)ROTATE ACCUMULATOR RIGHT WITH CARRY: RAR (no operand):

Each binary bit of the accumulator is rotated right by one position through carry flag. Bit D0 is placed in the carry flag, and the carry flag is placed in the least significance position D7. CY is modified according to bit D7. S, Z, P, AC are not affected.
Example:
RAR

7)CONTROL INSTRUCTIONS:

1. NO OPERATION : NOP( no operand):

No operation is performed. The ionstruction is fetched and decoded. However no oparetion is executed.
Example:
NOP
2. HALT AND ENTER WAIT STATE: HLT( no operand):

The CPU finishesexecuting the current instruction and halts any further execution. An interrupt or reset is necessaryto exit from te halt state.
Example:
HLT
3. DISABLE INTERRUPTS: DI (no operand):

The interrupt enable flip flop is reset and all the interrupts except the TRAP are disable. No flags are affected.
Example:
DI
4. ENABLE INTERRUPTS: EI (no operands):

The interrupt enable flip flop is set and all the interrupts are enabled. No flags are affected. After a system reset or acknowledgement of an interrupt, the interrupt enable flip flop is reset, thus disabling the interrupts. This instruction is necessary to reenable the interrupts ( except TRAP).
Example:
EI
5. READ INTERRUPT MASK: RIM (no operand)

This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit. The instruction loads 8-bits in the accumulator.
Example:
RIM
6. SET INTERRUPR MASK: SIM (no operands):

This is a multipurpose instruction and used to implement the 8085 interrupts 7.5, 6.5, 5.5 and serial data output.
Example:
SIM.

Assignment No.-1

Assignment no 1( date of submission 9th Feb,Monday)
1. Explain in detail the architecture of 8085 Microprocessor.
2. Explain the pin diagram of 8085 Microprocessor in detail.
3. What is a DMA Controller? Discuss in detail the block diagram and pin diagram of 8251 I/O processor.
4. Explain ten instructions of Assembly Language along with syntax and examples.
5. Differentiate between Synchronous and asynchronous mode of Data transfer with the help of diagram.

Assembly Language Instructions along with examples and explanation

Description and example
1.) Add register or memory to accumulator(ADD) R
The contents of operand(registor of memory)are M addaed to the contents of accumulator and the result is stored in the accumulator if the operand is a memory location its location is specified by the contents of of the HL registor.all flages are modified to reflect the result of the addition.
EXAMPLE:ADD B or ADD M
2)Add registor to accumulator with carry(ADC) R
The contents of the operand(registor or memory)and M the carry flag are added to the contents of the accumulator and the result is store in the accumulator.if the operand is a memory location is specify by the contents of the HL registors.All flages are modified to reflect the result of the addition.
EXAMPLE:ADC B or ADC M
3)Add immediate to accumulator(ADI) 8 bit data
The 8 bit data(operand)is added to the contents of the accumulator and the result is stored in the accumulator. All flages are modified to relect the result the result of addition.
EXAMPLE: ADI 45H
4)Add immediate to accumulator with carry(ACI) 8 bit data
The 8 bit data(operand)and the carry flages are added to the contents of the accumulator and the result is stored in the accumulator. All flages are modified to relect the result the result of addition.
EXAMPLE: ACI 45H

5)Add register pair to H and L register(DAD) Reg. pair
The 16 bit contents of the specified register pair are added to the contents of the HL registor and the sum is stored to the HL register. The cotentsof the source register pair are not altered.if the result is larger than 16 bits the CY flag is set .no other flages are affected.
EXAMPLE: DAD H
6)Subtract register or memory from a accumulator(SUB) R
The contents of operand(registor of memory)are M subtacted to the contents of accumulator and the result is stored in the accumulator if the operand is a memory location its location is specified by the contents of of the HL registor.all flages are modified to reflect the result of the subtaction.
EXAMPLE:SUB or SUB M
7)Subtract source and borrow from accumulator (SBB) R
The contents of operand(registor of memory)are M the borrow flag are subtracted from contents of accumulator and the result is stored in the accumulator. if the operand is a memory location its location is specified by the contents of of the HL registor.all flages are modified to reflect the result of the subtaction.
EXAMPLE:SBB B or SBB M
8)Subtract immediate from accumulator(SUI) 8 bit data
The 8 bit data(operand)is subtracted to the contents of the accumulator and the result is stored in the accumulator. All flages are modified to reflect the result the result of subtraction.
EXAMPLE: SUI 45H
9)Subtract source and borrow frm accumulator(SBB) R
The 8 bit data(operand)and the borrow flages are subtracted from to the contents of the accumulator and the result is placed in the accumulator. If the operand is a memory location its location is specified by the contents of the HL register. All flages are modified to relect the result the result of subtraction.
EXAMPLE: SBB B or SBB M
10)Subtract immediate from accumulator(SUI) 8 bit data
The 8 bit data(operand)is subtracted to the contents of the accumulator and the result is stored in the accumulator. All flages are modified to relect the result the result of addition.
EXAMPLE: SUI 45H
11)Subtract immediate from accumulator with borrow(SBI) 8 bit data
The 8 bit data(operand) and the borrow flages are subtracted from the contents of the accumulator and the result is stored in the accumulator. All flages are modified to reflect the result the result ofsubtaction.
EXAMPLE: SBI 45H
12) Increment register or memory by 1(INR) R
The contents of the designated register or memory are M incremented by 1 and the results stored in the same place.If the operand is a memory location ,its location is specified by the contents of the HL register.
EXAMPLE:INR B or INR M
13 )Increment register pair by 1(INX) R
The contents of the designated register or memory are M incremented by 1 and the result is stored in the same place.
EXAMPLE:INX H
14)Decrement register or memory by 1(DCR) R
The contents of the designated register or memory are M decrement by 1 and the results stored in the same place.If the operand is a memory location ,its location is specified by the contents of the HL register.
EXAMPLE:DCR B or DCR M
15) Dcremented register pair by 1(DCX) R
The contents of the designated register or memory are M decremented by 1 and the result is stored in the same place.
EXAMPLE:DCX H
16)Decimal adjust accumulator(DAA) none
The contents of the accumulator are changed from a binary value to two 4 bit binary coaded decimal digit.this is the only instruction that uses the auxiliary flag to perform the binary to bcd convertion and the convertion procedure is described below.S,Z,AC,P,CY flags are alter to reflect he result of the operation.
If the value of the low order 4 bits in the accumulator is greater then 9 or if ac flag is set,the instruction adda 6 to the low order 4 bits.
If the value of the high order 4 bits in the accumulator is greter than 9 or if the carry flag is set,the instruction adda 6 to high order four bits.
EXAMPLE:DAA
17) Jump unconditionally (JMP) 16 bit adderess
The program sequence is transferred to the memory location specified by the 16 bit address given to the operand.
EXAMPLE:JMP 2034H or JMP XYZ
18) Load program counter with HL contents(PCHL) none
The contents of registers H and L are copied into the program counter.the contents of H are placed as high order byte and the contents of Las the low order byte.
EXAMPLE:PCHL
19) Reset(RST) 0-7
The RST instructionis equivalent to a 1 byte call instruction to one of eight memory location depending upon the number.
The instruction are generally used in conjuction with interrupts and inserated using external hardware. However these can be used as instruction in a program to transfer program exeution to one of the eight location.the address are:
Instruction restart address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H
The 8085 has four additional interrupts and these interuupts generate RST instruction internally and thus do not require any external hardware. These instructions and their resrart addresses are:
Interupt Restart address
TRAP 0024H
RST 5.5 002CH
RST 6.5 0034H
RST 7.5 003CH
20) Compare register or memory with accumulator(CMP) R
The contents of the operand are M compared with the contents of the accumulator. Both contents are preserved. The result of comparison is shown by setting the flags of the PSW as follows:
If(A)<(reg/mem):carry flag is set
If(A)=(reg/mem):zero flag is set
If(A)>(reg/mem):carry and zero flags are reset
Example: CMP B or CMP M

21) Compare immediate with accumulator(CPI) 8 bit data
The second byte is compared with the contents of the accumulator. The values being compared remain unchanged. The result of the comparison is shown by setting the flags of the PSW as follows:
If(A)If(A)=data: zero flag is set
If(A)>data: carry and zero flags are reset
EXAMPLE: CPI 89H
22) Logical AND register or memory with accumulator(ANA) R
The contents of the accumulator are logically ANDed with M the contents of the operand and the result is placed in the accumulator . if the operand is memory location its address is specified by the contents of HL register. S,Z,P are modified to reflect the result of the operation. CY is reset. AC is set.
EXAMPLE:ANA B or ANA M
23) Logical AND immediate with accumulator(ANI) 8 BIT DATA
The contents of the accumulator are logically ANDed with the 8 bit data and the result is placed accumulator. S, Z,P, are modified to reflect the result of the operation. CY is the reset. AC is set.
EXAMPLE: ANI86H
24) Exclusive OR register or memory with accumulator(XRA) R
The contents of accumulator are execlusive OR ed with M the contents of the operand and the result is placed in the accumulator.if the operand is a memory location its address is specified by the contents of HL registers S,Z,P are modified to reflect the result of the operation.CY and AC are reset.
EXAMPLE:XRA B or XRA M
25) Exclusive OR imeediate with the accumulator(XRI) 8 bit data
The contents of the accumulator are exclusive ORed with the 8 bit data and the result is placed accumulator. S, Z,P, are modified to reflect the result of the operation. CY is the reset. AC is set.
EXAMPLE: XRI 86H
26) Copy from source to destination(MOV) Rd,Rs
This instruction copies the contents of the source M, Rs register into the destination register; the contents of Rd, M the source register are not altered. If one of the operands is a memory location, its location is specified by the contents of the HL registers.
EXAMPLE: MOV B,C or MOV B,M
27) Move immediate 8-bit (MVI)Rd,data
The 8-bit data is stored in the destination register or M, data memory. If he operand is a memory location, its location is specified by the contents of the HL registers.
EXAMPLES: MVI B,57H or MVI M,57Hq
28) Load accumulator(LDA) 16-bit address
The contents of a memory location, specified by a 16-bit address In the operand, are copied to the accumulator. The contents of the source are not altered.
EXAMPLE: LDA 2034H
29) Load accumulator indirect (LDAX) B/D register pair
The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. The contents of either the register pair or the memory location are not altered.
EXAMPLE: LDAX B

30) Load register pair immediate(LXI) Reg. pair,16-bit data
The instruction loads 16-bit data in the register pair designated in the operand.
EXAMPLE: LXI H, 2034H or LXI H,XYZ

31) Load H and L register direct (LHLD) 16-bit address
The instruction copies the contents of the memory location pointed out by the 16-bit address into register L and copies the contents of the next memory location into register H. the contents of source memory locations are not altered.
EXAMPLE: LHLD 2040H

32) Store accumulator direct (STA) 16-bit address
The contents of the accumulator are copied into the memory location specified by the operand. This is a 3-byte instruction, the second byte specifies the low order address and the third byte specifies the high order address.
EXAMPLE: STA 4350H

33) Store accumulator indirect(STAX) Register pair
The contents of the accumulator are copied into the memory location specified by the contents of the operand ( register pair ). The contents of the accumulator are not altered.
Example : STAX B

34) Store H and L Register Direct (SHLD ) 16-bit address
The contents of register L are stored into the memory location specified by the 16 bit address in the operand and contents of H register are stored into next memory location by incrementing the operand. The contents of register HL are not altered. This is a 3-byte instruction, the second bytes specified the low order address and the third byte specified the high order address.
Example : SHLD 2470H