TEN MARKS QUESTIONS

Section C(10 MARKS)

FROM LAST YEARS QUESTION PAPERS

1. Draw the block diagram of 8255 and explain its various modes. Also write down the control word for various combinations.
2. Write short notes on the following:
(i) 8251
(ii) Interfacing Seven Segment Display
3. Write an 8085 based assembly language program to find the square root of a number.
4. Explain the block diagram of 8086 microprocessor.
5. What do you mean by SIMULATION and EMULATION? In what way do these help in the development of a microprocessor based system?
6. Write an assembly language program to get the 2’s complement of a 16-bit number
7. What do you understand by DMA? Draw and explain the block diagram of 8257.
8. Describe the traffic light system, stepper motor interface.
9. Explain Microprocessor Development System.
10. (i)Write an 8085 based assembly language program to find the square root of a number.
(ii) Calculate the time required to execute the following two instructions if the system clock frequency is 750 kHz.
11. Draw block diagram of 8086 and explain the registers of 8086.
12. Explain how traffic light system works using stepper motor interface.
13. Interface the following memory ICS with 8086.
(i)Two 4KB EPROMS, ending at FFFFFH
(ii)Two 4KB SRAMS, starting at 00000H.
14. Describe the traffic light system, stepper motor interface.
15. Draw the 8085 timing of execution of the 2 byte instruction MVI A,32h ( load Accumulator with data 32h) & store in location as follows:
(i) 2000 3E
(ii) 2001 32
16. (i)Write the machine code for the instruction MOV H, A if the opcode=01, the register code for H=100 and register code for A=111.
(ii)Explain why the PTR attribute is sometimes necessary in 8086.
17. Write instruction to clear the CY flag, to load number FFH in register C, & to add 01 to (C),If the CY flag is set ;display 01 at an output port otherwise display the content of register C.
18. Explain how traffic light system works using stepper motor interface.
19. Draw the 8085 timing of execution of the 2 byte instruction MVI A,32H (load the accumulator with data 32H) and store in location as follows : Memory Location Machine Code Mnemonics2000 3E MVI A, 32H2001 32


20. (i)Write the 8085 mnemonics and the machine code to transfer the program sequence to the location 0155H.(ii) Calculate the time required to execute the following two instructions if the system clock frequency is 750 kHz.MOV C,B 5 T-statesJMP 2050H 10 T-states
21. Write instructions to clear the CY flag, to load number FFH in register B, and increment. If the CY flag is set, display 01 at an output port; otherwise display the contents of register B.

FIVE MARKS QUESTIONS

Section B(5 MARKS) FROM LAST YEARS QUESTION PAPERS
1. Draw the timing diagram of MOV B, A instruction.
2. Write an ALP to divide 16 bit no. by 8 bit no.
3. Draw the Block diagram of 8257.
4. Discuss various addressing modes of 8085.
5. Explain the interfacing 8251 chip with 8085 microprocessor.
6. Explain the function of the following 8085 instructions with examples.
(i) LHLD
(ii) XCHG
(iii) STA
(iv) JNC
(v) MVI
7. Write an 8085 based assembly language program to arrange a series of numbers in descending order.
8. Discuss the design of microprocessor based traffic light system.
9. What is RIM? Discuss the bit pattern of the accumulator for RIM instruction.
10. Explain the following instructions:
(i) SHLD 2040h
(ii) JMP
(iii) DAA
11. Discuss various addressing modes of 8085. explain with examples
12. Write an assembly language program to calculate the 2’s complement of a 16 bit no.
13. Explain why the PTR attribute is sometimes necessary in 8086
14. Differentiate between microprocessor and microcontroller.
15. Discuss various addressing modes of 8085. explain with examples
16. Draw timing diagram for MOV A,M instruction.
17. Explain the following instructions.
(i) MOV A, M
(ii) DAA
(iii) JMP 2000h
18. Differentiate between microprocessor and microcontroller.
19. Write an ALP to multiply the contents of memory location 2040h to 2041h.
20. Discuss various addressing modes of 8085.
21. Explain the control word register of 8255.
22. Differentiate between microprocessor and microcontroller.
23. Diagrammatically explain the difference between memory mapped & peripheral mapped I/O.
24. Draw a circuit diagram demonstrating how to create a 32k x 8 EPROM from two 16k x 8 EPROMs showing all signal connections.
25. Write an assembly language program to calculate the 2’s complement of a 16 bit no
26. Write an assembly language program that reads numbers from the users until the user types 5.
27. W.A.P. to generate Fibonacci sequence.
28. Draw Block diagram of 8251.
29. The instruction code 01001111 (4fh) is stored in memory location 2005 h, illustrate the data flow & list the sequence of events when the instruction code is fetched by MPU.
30. Draw a schematic to demultiplex bus ADO – AD7 using octal latch.
31. How does 8085 based single board microcomputer works?
32. Write an 8085 based assembly language program to arrange a series of numbers in descending order.
33. Write in brief about 8085 registers.
34. Draw microcomputer system using 8085 MPU, to memory (EEPROM, RWM), input and output and bus linking to (I/O and memory) peripherals to the MPU.
35. Draw the functional block diagram of 8085 microprocessor. Using example explain how an instruction is decoded and executed.
36. Explain the function of ALE and IO/M signals of the 8085 microprocessor.

TWO MARKS QUESTIONS

IMPORTANT QUESTIONS OF MOCROPROCESSORS FOR SEMESTER PAPERS
(Note: To be done by heart)
Section A
1. Many registers are available in 8086?
2. If A and B register contains 4 and 5 respectively what will be the status of Cy flag after execution of CMPB instruction?
3. What will be the contents of PC after execution of RST 7 instruction?
4. What is the word size of 8085 microprocessors? Which bus decides the word length of microprocessor?
5. Why demultiplexing of ADO – AD7 is required?
6. What is a parity flag? When is it affected?
7. State True or False:
a. CPU consists of ALU, PC and Instruction Register.
b. Instruction Cycle – Fetch Cycle + Execute Cycle
c. There is no direct instruction available to transfer 100 bytes from one location to another in 8085.
d. Only 8 Hardware interrupts can be handled with interrupt controller.
e. MOV, A, M is an example of indirect addressing
f. In RISC processor the No. of addressing modes are less than 4. False
g. An instruction will be executed in two machine cycles.
8. What do you mean by a synchronous and asynchronous bus? Give at least one explain of each.
9. Explain the function of the following 8085 instructions with example:
(i)XRA
(ii)RLC
10. Discuss the function of the following signals of 8085.
(i) RD
(ii)ALE
11. Explain the requirement of a program counter in 8085 microprocessor.
12. What is DMA data transfer? Explain in brief.
13. Explain what is SIM.
14. Explain the role of an emulator in microprocessor based system development
15. What is a single chip microcomputer? Explain.
16. Distinguish between PROM and ROM.
17. What are Volatile and Non-Volatile Memory?
18. Why the Instruction OUT 1234H, AL fails to compile?
19. Distinguish between synchronous and Asynchronous buses.
20. Write about the move instruction of 8085.
21. Discuss how pipelining improve performance.
22. Discuss the interrupt handling of 68000.
23. Give an example of a single 68000 assembly instruction involving an immediate addressing mode and an absolute address mode.
24. What is the basic difference between branch and call subroutine instruction?
25. Explain the function of the following 8085 instructions with example:
(i) XRA
(ii)RLC
26. Discuss the function of the following signals of 8085.
(i)RD
(ii)ALE
27. Explain four ways to clear the contents of accumulator.
28. Explain the requirement of a program counter in 8085 microprocessor.
29. What will be the contents of PC after execution of RST 5 instruction?
30. What is the word size of 8086 Microprocessor? Which bus decides and word length of a Microprocessor?
31. Explain SIM instruction in 8085.
32. What is a PSW?
33. What is a single chip microcomputer? Explain.
34. Find the errors in the following instructions.
(i)POP CS
(ii)ROR BL, 04
35. Write an assembly program that accepts an string of characters?
36. What is the word size on the 8086?
37. List the sequence of operations needed for the FETCH cycle of a basic computer?
38. How many clock cycles occur in 1 wait cycle?
39. Why data transfer with DMA is accelerated?
40. What is the last instruction executed by every interrupt?
41. What is the function of IF flag?
42. What is contained in interrupt vector table of each interrupt?
43. How many bus cycles are required to read as unaligned word of data from memory?
44. Write advantage of the assembly language in comparison with high-level language.
45. Write down the communication steps with an I/O device which are similar to those in communicating with memory.
46. Draw diagram of a memory chip with eight registers.
47. If the memory chip size is 256 x 1 bits, how many chips are required to make 1k byte of memory?
48. Draw Timing diagram of memory read cycle
49. Explain the function of system controller in 8085.
50. List the four categories of 8085 instructions that manipulate data.
51. Give the sum and flag setting for AF,ZF,SF,PF,CF and OF after hexadecimally adding 4AE0 to each of the following:
(i) 9090
(ii)EA04
52. Write note on 8051 chip.
53. Draw the timing diagram of memory write cycle.
54. Explain the following terms:
(i) SSI
(ii) MSI
(iii) LSI.
55. Write note on 8051 chip.
56. List the four categories of 8085 instructions that manipulate data
57. If the memory chip size is 1024x4 bits, how many chips are required to make up 2k bytes of memory?
58. List three improved features of the 8086over 8085
59. Explain two byte and three byte instructions.
60. Give the sum and the flag settings for AF, SF, ZF, CF, OF & PF after hexadecimally adding 62A0 to each of the following:(i)1234(ii)4321
61. How PROM programming differ from ROM programming?
62. Compare Motorola 68000 with 8086.

Some More Assembly Language Instructions

Some more Assembly language instructions

1.)LOGICAL OR REGISTER OR MEMORY WITH ACCUMULATOR:
ORA (R):

The contents of the accumulator are logically ORed with M the contents of operand(register or memory), and theb result is placed in the accumulator.
If the operand is the memory location, its address is specified by the contents of HL registers. S, Z, P are modified to reflect the result of the operation, CY ands AC are reset.
Example:
ORA B or ORA M

2)LOGICAL OR IMMEDIATE WITH ACCUMULATOR: ORI 8- bit data:

The contents of the accumulator are logically ORed with the 8-bit data(operand) and the result is placed in the accumulator. S, Z, P are modified to reflect the result of operation. CY and AC are reset.
Example:
ORI 86H
3)ROTATE ACCUMULATOR LEFT : RLC (no operand)

Each binary bit of the accumulator is rotated left by one position. Bit D7 is placed in the position of D0 as well as in carry flag. CY is modifiedaccording to the bit D7. S, Z, P, AC are not affected.
Example:
RLC
4)ROTATE ACCUMULATOR RIGHT: RRC (no operand):

Each binary bit of the accumulator is rotated by ont position. Bit D0 is placed in position of D7 as well as in the carry flag. CY is modified according to bit D0. S, Z, P, AC are not affected.
Example:
RRC
5)ROTATE ACUMULATOR LEFT THROUGH CARRY: RAL (no operand):

Each binary bit of the accumulator is rotated left by one position through carry flag. Bit D7 is placed in the carry flag, and the carry flag is placed in the least significance position D0. CY is modified according to bit D7. S, Z, P, AC are not affected.
Example:
RAL
6)ROTATE ACCUMULATOR RIGHT WITH CARRY: RAR (no operand):

Each binary bit of the accumulator is rotated right by one position through carry flag. Bit D0 is placed in the carry flag, and the carry flag is placed in the least significance position D7. CY is modified according to bit D7. S, Z, P, AC are not affected.
Example:
RAR

7)CONTROL INSTRUCTIONS:

1. NO OPERATION : NOP( no operand):

No operation is performed. The ionstruction is fetched and decoded. However no oparetion is executed.
Example:
NOP
2. HALT AND ENTER WAIT STATE: HLT( no operand):

The CPU finishesexecuting the current instruction and halts any further execution. An interrupt or reset is necessaryto exit from te halt state.
Example:
HLT
3. DISABLE INTERRUPTS: DI (no operand):

The interrupt enable flip flop is reset and all the interrupts except the TRAP are disable. No flags are affected.
Example:
DI
4. ENABLE INTERRUPTS: EI (no operands):

The interrupt enable flip flop is set and all the interrupts are enabled. No flags are affected. After a system reset or acknowledgement of an interrupt, the interrupt enable flip flop is reset, thus disabling the interrupts. This instruction is necessary to reenable the interrupts ( except TRAP).
Example:
EI
5. READ INTERRUPT MASK: RIM (no operand)

This is a multipurpose instruction used to read the status of interrupts 7.5, 6.5, 5.5 and read serial data input bit. The instruction loads 8-bits in the accumulator.
Example:
RIM
6. SET INTERRUPR MASK: SIM (no operands):

This is a multipurpose instruction and used to implement the 8085 interrupts 7.5, 6.5, 5.5 and serial data output.
Example:
SIM.

Assignment No.-1

Assignment no 1( date of submission 9th Feb,Monday)
1. Explain in detail the architecture of 8085 Microprocessor.
2. Explain the pin diagram of 8085 Microprocessor in detail.
3. What is a DMA Controller? Discuss in detail the block diagram and pin diagram of 8251 I/O processor.
4. Explain ten instructions of Assembly Language along with syntax and examples.
5. Differentiate between Synchronous and asynchronous mode of Data transfer with the help of diagram.

Assembly Language Instructions along with examples and explanation

Description and example
1.) Add register or memory to accumulator(ADD) R
The contents of operand(registor of memory)are M addaed to the contents of accumulator and the result is stored in the accumulator if the operand is a memory location its location is specified by the contents of of the HL registor.all flages are modified to reflect the result of the addition.
EXAMPLE:ADD B or ADD M
2)Add registor to accumulator with carry(ADC) R
The contents of the operand(registor or memory)and M the carry flag are added to the contents of the accumulator and the result is store in the accumulator.if the operand is a memory location is specify by the contents of the HL registors.All flages are modified to reflect the result of the addition.
EXAMPLE:ADC B or ADC M
3)Add immediate to accumulator(ADI) 8 bit data
The 8 bit data(operand)is added to the contents of the accumulator and the result is stored in the accumulator. All flages are modified to relect the result the result of addition.
EXAMPLE: ADI 45H
4)Add immediate to accumulator with carry(ACI) 8 bit data
The 8 bit data(operand)and the carry flages are added to the contents of the accumulator and the result is stored in the accumulator. All flages are modified to relect the result the result of addition.
EXAMPLE: ACI 45H

5)Add register pair to H and L register(DAD) Reg. pair
The 16 bit contents of the specified register pair are added to the contents of the HL registor and the sum is stored to the HL register. The cotentsof the source register pair are not altered.if the result is larger than 16 bits the CY flag is set .no other flages are affected.
EXAMPLE: DAD H
6)Subtract register or memory from a accumulator(SUB) R
The contents of operand(registor of memory)are M subtacted to the contents of accumulator and the result is stored in the accumulator if the operand is a memory location its location is specified by the contents of of the HL registor.all flages are modified to reflect the result of the subtaction.
EXAMPLE:SUB or SUB M
7)Subtract source and borrow from accumulator (SBB) R
The contents of operand(registor of memory)are M the borrow flag are subtracted from contents of accumulator and the result is stored in the accumulator. if the operand is a memory location its location is specified by the contents of of the HL registor.all flages are modified to reflect the result of the subtaction.
EXAMPLE:SBB B or SBB M
8)Subtract immediate from accumulator(SUI) 8 bit data
The 8 bit data(operand)is subtracted to the contents of the accumulator and the result is stored in the accumulator. All flages are modified to reflect the result the result of subtraction.
EXAMPLE: SUI 45H
9)Subtract source and borrow frm accumulator(SBB) R
The 8 bit data(operand)and the borrow flages are subtracted from to the contents of the accumulator and the result is placed in the accumulator. If the operand is a memory location its location is specified by the contents of the HL register. All flages are modified to relect the result the result of subtraction.
EXAMPLE: SBB B or SBB M
10)Subtract immediate from accumulator(SUI) 8 bit data
The 8 bit data(operand)is subtracted to the contents of the accumulator and the result is stored in the accumulator. All flages are modified to relect the result the result of addition.
EXAMPLE: SUI 45H
11)Subtract immediate from accumulator with borrow(SBI) 8 bit data
The 8 bit data(operand) and the borrow flages are subtracted from the contents of the accumulator and the result is stored in the accumulator. All flages are modified to reflect the result the result ofsubtaction.
EXAMPLE: SBI 45H
12) Increment register or memory by 1(INR) R
The contents of the designated register or memory are M incremented by 1 and the results stored in the same place.If the operand is a memory location ,its location is specified by the contents of the HL register.
EXAMPLE:INR B or INR M
13 )Increment register pair by 1(INX) R
The contents of the designated register or memory are M incremented by 1 and the result is stored in the same place.
EXAMPLE:INX H
14)Decrement register or memory by 1(DCR) R
The contents of the designated register or memory are M decrement by 1 and the results stored in the same place.If the operand is a memory location ,its location is specified by the contents of the HL register.
EXAMPLE:DCR B or DCR M
15) Dcremented register pair by 1(DCX) R
The contents of the designated register or memory are M decremented by 1 and the result is stored in the same place.
EXAMPLE:DCX H
16)Decimal adjust accumulator(DAA) none
The contents of the accumulator are changed from a binary value to two 4 bit binary coaded decimal digit.this is the only instruction that uses the auxiliary flag to perform the binary to bcd convertion and the convertion procedure is described below.S,Z,AC,P,CY flags are alter to reflect he result of the operation.
If the value of the low order 4 bits in the accumulator is greater then 9 or if ac flag is set,the instruction adda 6 to the low order 4 bits.
If the value of the high order 4 bits in the accumulator is greter than 9 or if the carry flag is set,the instruction adda 6 to high order four bits.
EXAMPLE:DAA
17) Jump unconditionally (JMP) 16 bit adderess
The program sequence is transferred to the memory location specified by the 16 bit address given to the operand.
EXAMPLE:JMP 2034H or JMP XYZ
18) Load program counter with HL contents(PCHL) none
The contents of registers H and L are copied into the program counter.the contents of H are placed as high order byte and the contents of Las the low order byte.
EXAMPLE:PCHL
19) Reset(RST) 0-7
The RST instructionis equivalent to a 1 byte call instruction to one of eight memory location depending upon the number.
The instruction are generally used in conjuction with interrupts and inserated using external hardware. However these can be used as instruction in a program to transfer program exeution to one of the eight location.the address are:
Instruction restart address
RST 0 0000H
RST 1 0008H
RST 2 0010H
RST 3 0018H
RST 4 0020H
RST 5 0028H
RST 6 0030H
RST 7 0038H
The 8085 has four additional interrupts and these interuupts generate RST instruction internally and thus do not require any external hardware. These instructions and their resrart addresses are:
Interupt Restart address
TRAP 0024H
RST 5.5 002CH
RST 6.5 0034H
RST 7.5 003CH
20) Compare register or memory with accumulator(CMP) R
The contents of the operand are M compared with the contents of the accumulator. Both contents are preserved. The result of comparison is shown by setting the flags of the PSW as follows:
If(A)<(reg/mem):carry flag is set
If(A)=(reg/mem):zero flag is set
If(A)>(reg/mem):carry and zero flags are reset
Example: CMP B or CMP M

21) Compare immediate with accumulator(CPI) 8 bit data
The second byte is compared with the contents of the accumulator. The values being compared remain unchanged. The result of the comparison is shown by setting the flags of the PSW as follows:
If(A)If(A)=data: zero flag is set
If(A)>data: carry and zero flags are reset
EXAMPLE: CPI 89H
22) Logical AND register or memory with accumulator(ANA) R
The contents of the accumulator are logically ANDed with M the contents of the operand and the result is placed in the accumulator . if the operand is memory location its address is specified by the contents of HL register. S,Z,P are modified to reflect the result of the operation. CY is reset. AC is set.
EXAMPLE:ANA B or ANA M
23) Logical AND immediate with accumulator(ANI) 8 BIT DATA
The contents of the accumulator are logically ANDed with the 8 bit data and the result is placed accumulator. S, Z,P, are modified to reflect the result of the operation. CY is the reset. AC is set.
EXAMPLE: ANI86H
24) Exclusive OR register or memory with accumulator(XRA) R
The contents of accumulator are execlusive OR ed with M the contents of the operand and the result is placed in the accumulator.if the operand is a memory location its address is specified by the contents of HL registers S,Z,P are modified to reflect the result of the operation.CY and AC are reset.
EXAMPLE:XRA B or XRA M
25) Exclusive OR imeediate with the accumulator(XRI) 8 bit data
The contents of the accumulator are exclusive ORed with the 8 bit data and the result is placed accumulator. S, Z,P, are modified to reflect the result of the operation. CY is the reset. AC is set.
EXAMPLE: XRI 86H
26) Copy from source to destination(MOV) Rd,Rs
This instruction copies the contents of the source M, Rs register into the destination register; the contents of Rd, M the source register are not altered. If one of the operands is a memory location, its location is specified by the contents of the HL registers.
EXAMPLE: MOV B,C or MOV B,M
27) Move immediate 8-bit (MVI)Rd,data
The 8-bit data is stored in the destination register or M, data memory. If he operand is a memory location, its location is specified by the contents of the HL registers.
EXAMPLES: MVI B,57H or MVI M,57Hq
28) Load accumulator(LDA) 16-bit address
The contents of a memory location, specified by a 16-bit address In the operand, are copied to the accumulator. The contents of the source are not altered.
EXAMPLE: LDA 2034H
29) Load accumulator indirect (LDAX) B/D register pair
The contents of the designated register pair point to a memory location. This instruction copies the contents of that memory location into the accumulator. The contents of either the register pair or the memory location are not altered.
EXAMPLE: LDAX B

30) Load register pair immediate(LXI) Reg. pair,16-bit data
The instruction loads 16-bit data in the register pair designated in the operand.
EXAMPLE: LXI H, 2034H or LXI H,XYZ

31) Load H and L register direct (LHLD) 16-bit address
The instruction copies the contents of the memory location pointed out by the 16-bit address into register L and copies the contents of the next memory location into register H. the contents of source memory locations are not altered.
EXAMPLE: LHLD 2040H

32) Store accumulator direct (STA) 16-bit address
The contents of the accumulator are copied into the memory location specified by the operand. This is a 3-byte instruction, the second byte specifies the low order address and the third byte specifies the high order address.
EXAMPLE: STA 4350H

33) Store accumulator indirect(STAX) Register pair
The contents of the accumulator are copied into the memory location specified by the contents of the operand ( register pair ). The contents of the accumulator are not altered.
Example : STAX B

34) Store H and L Register Direct (SHLD ) 16-bit address
The contents of register L are stored into the memory location specified by the 16 bit address in the operand and contents of H register are stored into next memory location by incrementing the operand. The contents of register HL are not altered. This is a 3-byte instruction, the second bytes specified the low order address and the third byte specified the high order address.
Example : SHLD 2470H

Microprocessors & Assembly Language Programming

Two Marks Questions

1 mark Questions

State true or false:

Q1.The order of instructions used to initialize 8279 is important.Q2. RST 7.5 IS LATCHED IN 8085.Q3. After HOLD is activated, the bus control is relinquished by 8085 after the instruction is executed.Q4. INTA pulses are required because INTR is having the lowest priority.Q5. With encoded scan keyboard mode, the total number of keys are connected to 8279 is 128.Q6. Asynchronous mode of 8251 is used for very high rate of data transfer.

Q7. POP D is data transfer of instruction.Q8. ALE signal is required because higher order bus is multiplexed with data in 8085.
Q9. 'Opcode Fetch ’machine cycle is of 4t states for all instructions.Q10. RST 4.5 pin causes microprocessor 8085 to go in to ‘WAIT’ state.Q11. If register H=OOH, L=OIH, then by using DCX h instruction will set zero flag.Q12. RST5 is a direct addressing mode type instruction.

Fill in the blanks:

Q13. Microprocessor 8085 is a ------------------ bit processor.

Q14. Microprocessor 8086 is a ------------------ bit processor.

Q15. Microprocessor has ------------ number of pins.

Q16. Address bus of 8085 microprocessor is of -------- bits.

Q17. Data bus of 8085 microprocessor is of -------- bits.

Q18. Address bus of 8086 microprocessor is of -------- bits.

Q19. Data bus of 8086 microprocessor is of -------- bits.

Q20. Examples of 1-byte instruction -------------------------.

Q21. Examples of 2-byte instruction -------------------------.

Q22. Examples of 3-byte instruction -------------------------.

Q23. STA 2500 H takes ------------------ machine cycles.

Q24. LDA 2500 H takes ------------------ machine cycles.

Q25. MOV A,B takes ------------------ machine cycles.

Q26. LXI H 2600 H takes ------------------ machine cycles.

Q27. ADI ,09 takes ------------------ machine cycles.

Q28. IN ,02 takes ------------------ machine cycles.

Q29. Opcode fetch cycle takes ------------ T- states.

Q30. Memory read cycle takes ------------ T- states.

Q31. Memory write cycle takes ------------ T- states.

Q32. There are ------------- addressing modes.